The present invention relates to a semiconductor device technique, and particularly to a technique effective when applied to a semiconductor device having a power supply circuit.
In order to attain adaptation to miniaturization of a power supply circuit or the like and its fast response, a power MOS•FET (Metal Oxide Semiconductor Field Effect Transistor) used in a power supply has been proceeding toward an increase in high frequency in recent years.
In particular, a non-insulated type DC-DC converter used as a power supply circuit for a desk top type or notebook personal computer, a server or a game machine or the like has a tendency to increase in current and frequency with respect to a CPU (Central Processing Unit) and a DSP or the like to be controlled.
A DC-DC converter widely used as one example of a power supply circuit has a configuration wherein a power MOS•FET for a high side switch and a power MOS•FET for a low side switch are connected in series. The power MOS•FET for the high side switch has a switch function for control of the DC-DC converter, whereas the power MOS•FET for the low side switch has a switch function for synchronous rectification. The two power MOS•FETs are alternately turned on/off while being synchronized with each other to perform conversion of a source or power supply voltage.
Such a DC-DC converter has been described in, for example, Japanese Unexamined Patent Publication No. 2002-217416, which discloses a technique wherein a power MOS•FET for high side and a power MOS•FET for low side are configured with the same package, and the efficiency of voltage conversion between the power MOS•FET for high side and the power MOS•FET for low side is improved (refer to a patent document 1).
A technique wherein noise showing a problem at a DC-DC converter in which a control circuit, a driver circuit and a power MOS•FET are brought into one chip, is reduced by a resistor and a condenser, has been disclosed in, for example, Japanese Unexamined Patent Publication No. 2001-25239 (refer to a patent document 2).
Patent Document 1
    Japanese Unexamined Patent Publication No. 2002-217416Patent Document 2    Japanese Unexamined Patent Publication No. 2001-25239